The present invention relates to accurately controlling the current in an integrated circuit, and more specifically relates to generating multiple monolithic electrical currents, all referenced to a single accurate resistor.
As the need to reduce current in transceiver products and other integrated circuits increases, the need to more accurately control this current also increases. Typically, a design for an integrated circuit requires two currents: a current proportional to absolute temperature (IPTAT) and a bias current, which is defined herein as a current independent of temperature (IBIAS). In general, these currents are generated by placing an accurate on-chip voltage, such as a bandgap voltage or a thermal voltage, across a monolithic resistor. A monolithic resistor, also referred to as an internal resistor, is a resistor manufactured on the same semiconductor die as the associated integrated circuit. These electrical currents IPTAT and IBIAS are then provided to a current mirror, where the currents are mirrored as many times as necessary throughout the circuit.
Monolithic resistors typically have tolerances ranging from xc2x115% to xc2x125% at room temperature. In addition, the tolerance of monolithic resistors may vary an additional 5% to 25% across reasonable temperatures depending on resistor type and processing. Therefore, when the currents IPTAT and IBIAS are generated based on the resistance values of monolithic resistors, these currents may vary 35% or more.
In order to more accurately produce the currents IPTAT and IBIAS, accurate external or off-chip resistors have been used in place of the monolithic or on-chip resistors. The external resistors may have tolerances as low as 1%, thereby greatly increasing the accuracy of the currents IPTAT and IBIAS from 35% or more down to the accuracy of the on-chip voltage. Typically, multiple off-chip resistors are required to generate the currents IPTAT and IBIAS. However, the external resistors require additional pins to be added to the semiconductor die and increase the number of components, thereby increasing the cost of manufacturing the associated integrated circuit.
Therefore, there remains a need for a circuit and method for generating multiple monolithic electrical currents all referenced to a single external resistor.
The multiplication circuitry of the present invention operates to generate multiple monolithic electrical currents, all referenced to a single external resistor. A first current referenced to a first monolithic resistor, a second current referenced to a second monolithic resistor, and a third current referenced to an external resistor are used to generate an output current, which is also referenced to the external resistor. The present invention accurately generates two currents each being referenced to the single external resistor, while simultaneously minimizing the number of external connections and overall cost of producing the circuitry.
In an exemplary embodiment, a first current proportional to absolute temperature (IPTATINT) referenced to the first monolithic resistor, a first current independent of temperature (IBIASINT) referenced to the second monolithic resistor, and a second current independent of temperature (IBIASEXT) referenced to the external resistor are used to generate the output current. The output current is a second current proportional to absolute temperature (IPTATEXT), which is also referenced to the external resistor.
In one implementation of the exemplary embodiment, the multiplication circuitry of the present invention generates the second current proportional to absolute temperature (IBIASEXT) by multiplying the first current proportional to absolute temperature (IBIASINT) by a ratio of the second current independent of temperature (IBIASEXT) to the first current independent of temperature (IBIASINT). The multiplication circuitry may be biased by feedback circuitry such that the multiplication circuitry is held out of saturation. Further, the feedback circuitry may be configured to reduce the gain associated with the multiplication circuitry.
Those skilled in the art will appreciate the scope of the present invention and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.